Day 7 (16th June 2019)
Week 1 summary
We’re 1 week through the sprint, and so far I’ve put in an average of 2 hours per day, including the two weekend days. I’ve gotten one design run on the TinyFPGA BX board, for more designs to work I need to solder it down to a breadboard which I will do in the coming week.
In terms of my learning on Verilog, I’m getting the hang of writing Verilog code - there’s still ground to cover.
In terms of learning Verilator, I feel that the ZipCPU tutorials provide an good starting point in terms of reusable code. Today I will code up the UART co-simulation testbench as part of his 5th tutorial that describes a simple UART - the testbench is refactored at this point.
I have an exercise planned to test my Verilator skills - I want to build a simulation model for the very common ILI9341 built-in frame-buffer 320x240 displays and a tiny controller planned up for it that I want to code up as a peripheral to picosoc (a SoC based on the picorv32 RISC-V core), and then use it to display some graphics on the board.
The example is likely to come up in the coming weeks once I get hands-on with the picorv32 and the picosoc, after I finish going through all 10 ZipCPU beginner tutorials, which I assume at this point will probably take me one more week.
I worked on beginner tutorial #5 - simple UART peripheral and “Hello, World” transmitter - read it up and have started implementing the material on my own, following the example code - instead of just copy pasting the exercise code, I feel re-creating it is a better use of my time even though it takes a bit longer this way.
I also studied the iCE40 PLL datasheet as I will need it in the future to implement or use the USB on board.
I also studied the USB code present here as I’d like to use it with the TinyFPGA board and picosoc in the future - again I’ll start with a working example but hope to grow beyond it.