100 days of FPGA (and Digital Design)

Introduction
Links to learning resources
Week 6 continued (16th Sept - 22nd Sept)
- Day 41
- Day 40
- Day 39
Week 6 continued (12th Aug - 18th Aug)
- Day 38 (soft reboot)
Week 6 (15th July - 21st July)
- Day 37
- Day 36
Week 5 (8th July - 14th July)
- Day 35 and Week 5 summary
- Day 34
- Day 33
- Day 32
- Day 31
- Day 30
- Day 29
Week 4 (1st July - 7th July)
- Day 28 and Week 4 summary
- Day 27
- Day 26
- Day 25
- Day 24
- Day 23
- Day 22
Week 3 (24th June - 30th June)
- Day 21 and Week 3 summary
- Day 20
- Day 19
- Day 18
- Day 17
- Day 16
- Day 15
Week 2 (17th June - 23rd June)
- Day 14 and Week 2 summary
- Day 13
- Day 12
- Day 11
- Day 10
- Day 9
- Day 8
Week 1 (10th June - 16th June)
- Day 7 and Week 1 summary
- Day 6
- Day 5
- Day 4
- Day 3
- Day 2
- Day 1
Week 0 (2nd June - 9th June)
- Day 0
- Day -1
- Day -2
- Day -3
- Day -4
- Day -5
- Day -6
- Day -7

Day 19

Day 19 (28th June 2019)

Today reading “Advanced Digital Design in Verilog HDL” while on travel. Hardware work I will take up during the weekend.

Copyright © 2019 Kumar Abhishek